**Introduction**
Accurate high-end measurement of microampere-level currents requires a small-value shunt resistor and an amplifier with low offset voltage and ultra-low power consumption. This design provides a 280μA supply current to sense current across a wide dynamic range, from 100μA to 250mA. This minimizes power loss on the shunt resistor while maximizing available power for the load. The LTC2063’s rail-to-rail input allows operation at very low load currents, with the input common-mode voltage close to the supply rails. Its built-in EMI filter protects against RF interference in noisy environments. For a given sensed current, the output voltage is calculated as:
**Zero Point**
A critical factor in current sensing is the zero point, or the equivalent error current when no actual current is present. This is typically determined by the amplifier’s input offset voltage divided by RSENSE. The LTC2063 has a low input offset voltage (1μV typical, 5μV maximum) and very low input bias and offset current (1–3pA), resulting in a zero-point error of only 10μA (1μV / 0.1Ω) under normal conditions, and up to 50μA (5μV / 0.1Ω) at maximum. As shown in Figure 2, this low error ensures linearity at the lowest current level (100μA) without resolution loss. The output current-to-voltage curve remains linear across the full sensing range.
Another source of zero-point error comes from the PMOS output transistor's drain current when it is nominally off. A MOSFET with high leakage current can produce a non-zero VOUT even when no current is being measured.
The Infineon BSP322P used in this design has a maximum IDSS of 1μA at |VDS| = 100V. At room temperature and VDS = -7.6V, the typical IDSS is just 0.2nA, resulting in a negligible error of 1μV or about 100nA of equivalent input current.
**Building the Circuit**
The LT1389-4.096 reference, along with a bootstrap circuit using M2, R2, and D1, creates a low-power isolated 3V rail (4.096V + M2 VTH, typically -1V). This protects the LTC2063 from exceeding its maximum supply voltage of 5.5V. While a series resistor could provide a bias current, using M2 allows a higher overall supply voltage while keeping current consumption at just 280μA at the upper end.
**Accuracy**
The LTC2063’s input offset voltage introduces a fixed error of 10μA. At 250mA full scale, this results in a 0.004% error. However, at the lower end (100μA), the same 10μA error represents a 10% deviation. Since the offset is constant, it can be calibrated. Figure 3 shows that the total offset of the LTC2063, including any parasitic thermocouple effects and input resistance mismatch, is only 2μV.
The gain shown in Figure 3 is 100.05 V/V, slightly higher than the expected value of 98.77 V/V based on RDRIVE and RIN. This discrepancy may stem from differences in the temperature coefficients of these resistors.
Noise is the primary source of uncertainty in the circuit. Using large parallel capacitors helps reduce noise bandwidth and total noise. With a 1.5Hz output filter, the LTC2063 adds approximately 2μVP-P of low-frequency noise. Averaging over longer periods further reduces noise-related errors.
Other error sources include parasitic board resistance in series with RSENSE, tolerance in gain-setting resistors (RIN and RDRIVE), and temperature coefficient mismatches. These can be minimized by using Kelvin-sense 4-pin resistors for RSENSE and 0.1% resistors with low temperature coefficients for critical gain paths. To minimize thermocouple effects, R1 should have the same metal type as RIN, and asymmetrical thermal gradients should be avoided.
The total contribution of all error sources is up to 1.4% at a full-scale output of 2.5V, as shown in Figure 4.
**Supply Current**
As shown in Figure 5, the minimum supply current required is 2.3μA at 4.5V and 100μA ISENSE, increasing to 280μA at 90V and 250mA ISENSE. In addition to the active device current, the output current IDRIVE to M1 must also be considered. It varies from 200μA at 1mV output to 500μA at 2.5V output. Thus, the total supply current ranges from 2.5μA to 780μA. Setting RDRIVE to 5kΩ ensures proper ADC drive.
**Input Voltage Range**
In this design, the maximum supply voltage is limited by the PMOS output transistor’s maximum |VDS|. The BSP322P is rated for 100V, so 90V is a safe operating limit.
**Output Range**
This design can drive a 5kΩ load, making it suitable for many ADCs. The output voltage ranges from 0V to 2.5V. The LTC2063’s rail-to-rail output ensures minimal headroom limitations. The typical output voltage is 3V, set by the 4.096V reference and the -1V threshold of M2.
Since the output is current-based, ground or wire offset does not affect accuracy. This allows long leads between the output PMOS M1 and RDRIVE, enabling RSENSE to be placed near the current source and RDRIVE close to the ADC. However, longer leads increase EMI sensitivity. A 100nF capacitor (C3) on RDRIVE helps suppress harmful EMI before it reaches the next stage.
**Speed Limit**
With a gain-bandwidth product of 20kHz, the LTC2063 is best suited for signals up to 20Hz. A 22μF capacitor (C2) in parallel with the load filters the output noise to 1.5Hz, improving accuracy and protecting downstream stages from sudden current spikes. This filtering increases settling time, especially at the lowest current levels.
**Conclusion**
The LTC2063’s ultra-low input offset voltage, low bias current, and rail-to-rail inputs enable accurate current measurements from 100μA to 250mA. Its maximum supply current is only 2μA, ensuring that the circuit’s total supply current stays well below 280μA during most of its operational range. The low supply requirements of the LTC2063 allow for flexible power sourcing, including from alternative references with sufficient margin.
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